The invention relates to a converter for converting an input voltage between a first supply terminal and a second supply terminal to an output voltage, which converter includes switching means which, in the operating state, are alternately switched on and off under the control of a switching control signal, an inductive element which forms a series circuit in conjunction with the switching means, which series circuit is coupled between the first supply terminal and the second supply terminal, a control circuit for supplying the switching control signal, and evaluation means for evaluating a voltage across the switching means, said voltage exhibiting oscillating, and for supplying the control circuit with information so as to ensure that, generally speaking, the switching means is switched on only during a given local valley of the voltage across the switching means.
A converter of this kind is shown in FIG. 1 and is known from U.S. Pat. No. 5,754,414. A primary winding of a transformer 12 is coupled, together with a switching transistor 18, between a first supply terminal VS and a second supply terminal GND in order to receive an input voltage VS. The transformer 12 is also provided with a secondary winding 30. A voltage delivered by the secondary winding 30 is rectified by means of a diode 32 and subsequently smoothed by a smoothing capacitor 34, so that an output voltage V0 is delivered between an output terminal V0 and the second supply terminal GND. The operation of the known converter will be described in detail hereinafter with reference to the FIGS. 1 to 3. Between the instants t0 and t1 the base voltage Vb (relative to the second supply terminal GND) of the switching transistor 18 is substantially equal to 0 volts, so that the switching transistor 18 is not turned on. Consequently, the collector voltage Vc (relative to the second supply terminal GND) of the switching transistor 18 is substantially equal to the input voltage VS. At the instant t1 the base voltage Vb is increased to such an extent that the switching transistor 18 is fully turned on, so that the collector voltage Vc becomes practically equal to 0 volts. The voltage Vb remains high until the instant t2. As a direct consequence the voltage across the primary winding of the transformer 12 is substantially equal to the input voltage VS between the instant t1 and the instant t2, so that energy is stored in the primary winding of the transformer 12. At the instant t2 the base voltage Vb becomes substantially equal to 0 volts, so that the switching transistor 18 is abruptly switched off. Consequently, the stored energy is transferred to the secondary winding 30 and ultimately, via the rectifier diode 32, to a load (not shown in the Figures) which may be connected between the output terminal V0 and the second supply terminal GND. The abrupt switching off of the switching transistor 18 at the instant t2 causes a sudden increase of the collector voltage VC due to the inductance of the primary winding. The collector voltage VC, therefore, is substantially higher than the input voltage VS directly after the instant t2. The collector voltage VC subsequently starts to decrease as is indicated by the reference numeral 44 in FIG. 2. As from a given instant, denoted by the reference numeral 82, the collector voltage VC starts to exhibit oscillating. It is to be noted that the FIGS. 2 and 3 are shown in the cited United States patent specification in the context of an elucidation of conventional converters. However, the FIGS. 2 and 3 are also used to elucidate the known converter as described in the cited United States patent specification. For example, the cited United States patent specification states that, as is shown in the FIGS. 2 and 3, many conventional converters operate with a fixed switching frequency f. The switching frequency f is sufficiently low so that at the instant t3, corresponding to the instant t1, the collector voltage VC exhibits no or hardly any ringing; consequently, at the instant t3 the switching transistor 18 can be switched on again without the risk of the collector voltage VC being much higher than the input voltage VS so that the dissipation of the switching transistor 18 would be unnecessarily high. The switching transistor 18 might even become defective. Moreover, at the instant at which oscillating of the collector voltage VC stops it can be established with certainty that the transfer of energy from the transformer 12 to the load has ended. Because such conventional converters operate with a fixed switching frequency f which is so low that it is absolutely certain that at the instant t3 oscillating of the collector voltage VC has vanished, such conventional converters are not suitable for applications requiring a high switching frequency f. Therefore, in the known converter as shown in the cited United States patent specification steps are taken to ensure that this converter is suitable for a high switching frequency f. This means mainly that the converter adapts the switching frequency f each time, that is, also when the frequency of the ringing changes, in such a manner that the switching on of the switching transistor T18 takes place in response to the first minimum (in the first valley) of the oscillating collector voltage VC, said first minimum being denoted by the reference numeral 84 in FIG. 2. The transfer of energy from the transformer 12 to the load has not yet been completed at that instant. However, considering the fact that oscillating actually arises only at the instant at which the rectifier diode 32 starts to leave the conductive state, it will be evident that the major part of the energy has already been transferred to the load. The frequency of oscillating of the collector voltage VC is dependent, for example, on the type of transformer used. For this reason it is described in the cited United States patent that the switching frequency f of the converter should be variable and that it should be adapted automatically so as to ensure that the instant t3, as indicated in FIG. 2, more or less coincides with the first minimum 84 of the oscillating collector voltage It is a drawback of a converter in conformity with the cited United States patent that the switching frequency can in principle assume any value. For example, the switching frequency may thus be allowed to assume a very high value so that the efficiency of the converter could suffer. A solution to this problem is described in international patent application PCT/EP00/04377. The switching means therein are not necessarily switched on in response to the first local minimum. The choice of a different local minimum (in a different valley) in response to which the switching means can be switched on is enabled by the recognition of the fact that the frequency of the ringing voltage is much higher than the frequency of the oscillator signal. Frequency variations of the voltage across the switching means then ultimately result in variations in the selection of a local minimum, so that the switching frequency of the converter remains practically constant and is actually determined by the frequency of the oscillator signal.
Even though the switching frequency of a converter in conformity with the cited international patent application is reasonably constant, a (slight) frequency variation takes place nevertheless when the converter switches over from a given local minimum to a different local minimum. Because this transition is very brief, it need not have adverse effects in principle. However, it often occurs in practice that the necessary switching frequency is not exactly compatible with a given local minimum. As a result, the converter is liable to switch over continuously between two adjoining local minima. The switching frequency then continuously toggles between two frequencies. This may cause an annoying noise (whistling), for example, from the transformer.
It is an object of the invention to provide a converter which eliminates the described drawbacks.
To this end, the control circuit includes a frequency control circuit for controlling the switching frequency of the switching control signal in such a manner that the switching frequency varies within a frequency window which is determined by a lower limit frequency and an upper limit frequency, and in such a manner that, when the switching frequency becomes equal to the lower limit frequency or to the upper limit frequency, the frequency control circuit adapts the switching frequency in such a manner that it again varies within a further frequency window which is determined by a further lower limit frequency and a further upper limit frequency, the information being adapted in such a manner that, generally speaking, the switching means is switched on only during a given valley other than said local valley of the voltage across the switching means.
Because of the frequency window, the switching frequency cannot assume an arbitrarily low or high value. This eliminates the cited drawback of the converter in conformity with the cited United States patent. If the amount of power taken up changes, the switching frequency also changes. When the correct converter is locked in a given local valley (preferably exactly at the minimum) of the voltage across the switching means, said valley has an associated power window in which the power taken up may vary and the switching frequency of the switching means remains within the frequency window. If the power taken up leaves said power window, said information is adapted in such a manner that the converter is locked in a different valley. Said different valley is associated with another power window again. Because said other power window partly overlaps the former power window, actually a so-called hysteresis effect occurs between the locking from one valley to another valley. Periodic toggling of the switching frequency is thus avoided (unless the power consumption exhibits comparatively large periodic fluctuations). Annoying noise from the converter, such as a whistling noise from the transformer, is thus avoided.
In an embodiment of a converter in accordance with the invention the lower limit frequency of the further frequency window is equal to the lower limit frequency of the frequency window, and that the upper limit frequency of the further frequency window is the same as the upper limit frequency of the frequency window. This offers the advantage that only one frequency window is required.
In an embodiment of a converter in accordance with the invention the information includes an evaluation signal for indicating when the voltage across the switching means is lower than the input voltage, and also a further evaluation signal for indicating when the time derivative of the voltage across the switching means is approximately equal to zero. The evaluation signal ensures that the switching means can never be switched on when the voltage across the switching means is higher than the input voltage. The further evaluation signal ensures, in conjunction with the evaluation signal, that the switching means, generally speaking, can be switched on only during the minimum value of the valley in which the converter is locked. It may be advantageous to issue a command for switching on the switching means already just before the time derivative of the voltage across the switching means becomes equal to zero. Said derivative then has a small negative value. This is because electronic control circuits always require a given response time. This response time can be anticipated by attempting to switch on the switching means already when said derivative has a given small negative value. The exact value can be determined by experiments and/or simulations. Despite the required response time, the switching means can then be switched on exactly at an instant at which the voltage across the switching means exhibits a local minimum.
In an embodiment of a converter in accordance with the invention the frequency control circuit includes: a first counter with an up-input, a down-input, and a data output; a second counter with a reset input, an up-input and a data output; a digital comparator with a first data input which is coupled to the data output of the first counter, a second data input which is coupled to the data output of the second counter, and an output for supplying the switching control signal; means which are coupled so as to receive a first frequency reference signal which corresponds to the lower limit frequency and a second frequency reference signal which corresponds to the upper limit frequency, the means comparing the frequency of the switching control signal with the first frequency reference signal and with the second frequency reference signal, and supplying, in response to said comparison, either a down signal to the down-input or an up signal to the up-input of the first counter; and means for delivering a valley number signal of the ringing voltage, said valley number signal being derived from the evaluation signal and the further evaluation signal. A predominantly digital implementation is thus obtained for the frequency control circuit. Said means which are coupled so as to receive the first and the second frequency reference signals may be constructed, for example, in such a manner that the first and the second frequency reference signals are AC signals whose frequencies are related to the lower limit frequency and the upper limit frequency, respectively, of the frequency window. The first and the second frequency reference signals may also be, for example, DC voltages which correspond to the lower limit frequency and the upper limit frequency, respectively.
In an embodiment of a converter in accordance with the invention the means for delivering the valley number signal include an AND gate which has a first input for receiving the evaluation signal, a second input for receiving the further evaluation signal, and an output for delivering the valley number signal to the up-input of the second counter. This is a very simple implementation for the means for providing the valley number signal.
In an embodiment of a converter in accordance with the invention the frequency control circuit includes: a voltage-controlled oscillator which has an input for receiving a VCO control voltage and an output for supplying an oscillator signal; a first frequency control capacitor for supplying the VCO control voltage; a second frequency control capacitor; adaptation means for adapting a voltage across the first frequency control capacitor and the VCO control voltage by connecting the first frequency control capacitor and the second frequency control capacitor in parallel for approximately the period of time during which the switching means are switched on, and by discharging the second frequency control capacitor for approximately the period of time during which the switching means are switched off, and by applying the voltage across the second frequency control capacitor with a value which is higher than the value of the VCO control voltage during a part of the period of time during which the switching means are switched off, said part being determined by the oscillator signal. A predominantly analog implementation is thus obtained for the frequency control circuit.
In an embodiment of a converter in accordance with the invention the frequency control circuit also includes limiting means for limiting the voltage range of the VCO control voltage to a voltage window which is determined by a lower voltage limit which corresponds to the lower limit frequency and an upper voltage limit which corresponds to the upper limit frequency. This is a simple method of defining the frequency window.
In an embodiment of a converter in accordance with the invention the previous embodiment of the frequency control circuit also includes an AND gate with a first input for receiving the evaluation signal, a second input for receiving the further evaluation signal, a third input for receiving the oscillator signal, and an output for supplying the switching control signal. This is a very simple realization to ensure that the switching means can be switched on only if so permitted by the evaluation signal as well as the further evaluation signal and the oscillator signal.